About me:
I am a teaching assistant at the Institute of Computer Science, Universityof Podlasie. My main research interests are automated verification, UML
and model checking of concurrent systems. I am also a member of VerICS Group. We work on the verification system VerICS maintained in Institute of Computer Science Polish Academy of Sciences. My main contribution there
is the Bounded Model Checking for UML module (BMC4UML).
Artur Niewiadomski